STRUCTURAL LEVELS OF THE PDP-8 217
There are eight basic instructions encoded by 3 opcode bits of the instruction, that is, op<0:2>:= i<0:2>. Each of the first memory reference six instructions, where the opcode is less than or equal to 5, has four addressing modes (direct Page.Zero, direct Current. Page, indirect Page.Zero, and indirect Current.Page). The first six instructions in the following four categories are:
1. Data transmission.
"deposit and clear Accumulator" (dca). (Note that the add instruction, tad, is used for both data transmission and arithmetic.)
2. Binary arithmetic.
"two's complement add to the Accumulator" (tad).
3. Binary Boolean.
''and to the Accumulator'' (and).
4. Program control.
"jump/set Program Counter" (jmp); "jump to subroutine" (jms); "index memory and skip if results are zero" (isz).
The subroutine calling instruction, jms, provides a method for transferring a link to the beginning (or head) of the subroutine. In this way arguments can be accessed indirectly, and a return is executed by a 'jump indirect" instruction to the location storing the returned address. This straightforward subroutine call mechanism, although inexpensive to implement, requires reentrant and recursive sub routine calls to be interpreted by software rather than by hardware. A stack for subroutine linkage, as in the PDP-1 1, would allow the use of read-only memory program segments consisting of pure code. This scheme was adopted in the CMOS-8.
The "in-out transfer" instruction, opcode 6, TOT (op Eqv #6), uses the remaining nine bits of the instruction to specify instructions to input/output devices. The six IO.SELECT bits select 1 of 64 devices. Three conditional pulse commands to the selected device, IO.PULSE.1, IO.PULSE.2, and IO.PULSE.4, are controlled by the IOT, io.control<0:2> operation code bits. The instructions to a typical I/O device are:
1. Testing a Boolean Condition of an IO Device.
If IO.PULSE.l =>
(If IO.SKIP.FLAG[IO.SELECT] =>
PC = PC + 1)
2. Output data to a device from Accumulator.
If IO.PULSE.4 =>
(OUTPUT.REGISTER[IO SELECT] = AC)
3. Input data from a device to Accumulator.
If IO.PULSE.2 =>
(AC = INPUT.REGISTER [IO.SELECT])
There are three microcoded instruction groups selected by (op<0:2> Eqv #7), called the operate instructions. The instruction decoding diagram (Figure 5) and the ISP description show the microinstructions which can be combined in a single instruction. These instructions are: operate group 1 ((op<0:2> Eqv #7) And Not ib) for operating on the processor state; operate group 2 ((op<0:2> Eqv #7) And ib<3> And i< 11>) for testing the processor state; and the Extended Arithmetic Element group (op<0:2> Eqv #7 And i<3> And i<11>) for multiply, divide, etc. Within each instruction the remaining bits, <4:10> or <4:11>, are extended instruction (or opcode) bits; that is, the bits are microcoded to select additional instructions. In this way, an instruction is actually programmed (or microcoded, as it was originally named before "microprogramming" was used extensively). For example, the instruction, "set link to 1," is formed by coding the two micro instructions, "clear link" followed by "complement link."