Fig. 7. Flowchart to compute weighted average.

multiplications are not. We can simply treat these expressions (the X <- X[i] * W[i] and the S<- 5*. (1/W)) as standing for more complex RTM circuits. Thus, a direct mapping of the-flowchart leads to Figure 8 in which we have replaced the two multiplication expressions by the appropriate memory array accesses and also copies of the multiply subprocess of Figure 4. We have left out the data- memory part of the system, since the structure is apparent from the control part. There will be separate DMgpa's and Mc's for each of the two multiplications, as well as components for the other operations in- the flowchart. Two M(array)'s are necessary to hold the X's and the W's. We assume that the X's and 1/W are originally stored in the 8 most significant bits of their words, so that they load MPD properly.

In creating an RTM flowchart for the algorithm of Figure 7 there is no reason not to have written Figure 9, rather than Figure 8. Here we have not yet replaced the multiplication expressions by the subsystems. Instead we have simply indicated that there is something that evokes that multiplication by using the Kmacro that was introduced in Chapter 2. Thus, provided we have recorded someplace that Kmacro(P<-P*MPD) is the structure of Figure 4 (with names appropriately changed), Figures 8 and 9 give the same information.

SHARED FACILITIES: SUBROUTINES

It may have occurred to you that we were providing a lot of hardware for each multiplication, and that it would be nice to be able to share a single multiplication facility between the two uses of multiplication. This is exactly what the special control module Ksubroutine\Ksub permits. Figure 10 shows the algorithm of Figure 7 accomplished .in this fashion, giving links explicitly to the single version of the multiply subsystem. This subsystem is identical to the system of Figure 4, except that there is a Kserial-merge at the beginning to handle the multiple calls. No additional coordinating structure is required at the

118