T(general purpose interface)\Tgpi. The Tgpi provides for bidirectional transfer between external data and the RTM Bus. It contains a register, R<15:0> to buffer outgoing data. The R register can be written by the Bus, i.e. R <-. The input data lines can be read directly onto the Bus, i.e. <- Input <15:0>.

T(input interface)\Tin. This is just the input part of the Tgpi.

T(output interface)\Tout. This is just the output part of the Tgpi.

THE K(PROGRAMMED CONTROL SEQUENCER\PCS), A MICROPROGRAMMED

CONTROLLER FOR A CENTRALIZED ENCODED CONTROL PART

The RTM control structure as realized with interconnected standard evoke, branch, merge, and subroutine call control modules has the interesting and useful characteristic that the abstract control flowchart is isomorphic to the physically wired control structure. Hence, specifying the behavior of the digital system specifies the control structure. This one-for-one mapping simplifies the system design and implementation processes. The control structure actions are specified by K-type components, and the notion of 'the next control step is specified by a wire which directs the next K module to be active. One alternative to this control structure, called microprogramming, encodes the control structure (i.e., flowchart) into a memory. An interpreting control unit reads instructions from the encoded memory and carries out the appropriate control steps on a one-at- a-time basis in much the same way as the hardwired structure. Each step, called a microinstruction, stored in the microprogrammed control's memory, corresponds roughly to a .hardwired component. This microprogrammed control is implemented as a set of modules called the K(Programmed Control

Sequencer)\K(PCS).

K(PCS) MICROINSTRUCTION ENCODING

The various instruction encodings for the K(PCS), and the K modules that they correspond to are given in Figure 20. An 8-bit/word memory array holds the microinstructions. The status of the K(PCS) is held in a 9-bit Program Counter\PC plus a 1-bit PC-page which points to the currently active control step (1 of 2110 words).

Evoke Instructions

Each 8-bit memory cell can hold (encode) one of 192 (3x64) values which correspond to particular evoke functions (e.g., A <- A+1). Thus, a single cell corresponds identically to an instance of an evoke. Instructions 0 ~ 277v8 denote the coded range of evoke instructions.

Branch Instructions

The branch instruction occupies two words and has two variable fields: a 5- bit branch field to select 1 of 32 input conditions and a 9 bit address field to select 1 of 512 memory addresses. If the input branch Boolean condition is true, the branch will be taken, and the control will proceed to the address specified in the branch instruction. If the condition is not true, then the instruction following the branch will be taken. Note that by fixing one branch condition at true, one can create an unconditional branch instruction. An unconditional branch instruction is often called a jump.

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