Power Aware Computing AwardsMicrosoft Research is pleased to announce the 4 recipients of the 2008 Power Aware Computing RFP awards, which total $500,000 (USD) in funding. The goal of the Power Aware Computing RFP is to stimulate research that could dramatically increase the power efficiency of computing. The recipients proposals cover a range of related research topics focused on increasing power awareness, efficiency, and management at all levels, from Data Centers through compilers and micro-architecture, to instrumentation and the measurement of energy use. Power Aware Computing RFP Award RecipientsSimulating Low Power x86 Architectures with Sooner a Phoenix-based Simulation Framework
Ronald Barnes
University of Oklahoma, USA While previous generations of micro architectures were largely focused on increasing clock frequency, current and future micro architecture design has, and will continue to have, power consumption as a primary consideration. This work proposes an investigation of high-performance but low-power micro architectures using the Sooner Simulation Framework being developed at the University of Oklahoma with the Microsoft Phoenix tool. This framework will allow for the evaluation of low-power micro architectural techniques and can also be useful for providing feedback on power, performance, and related events that occur during the simulated execution of programs. This feedback can be valuable in the evaluation of other low-power system techniques including compilation and operating system level approaches. As power becomes the paradigm under which new ideas in computing are evaluated, everyone from architects to compiler designers to software developers are going to have to consider power implications. The proposed simulation framework will be a valuable tool across the spectrum of low-power hardware and software designers. The Sooner Simulation Framework will specifically be used to perform a study of low power micro architectures and their required compiler and operating system support focusing on two architectural models which may soon appear in microprocessors: In-order x86 and x86-64 superscalar architectures such as Intel Corporation’s Atom Processor Family, and Single-ISA heterogeneous multi-core processors such as those rumored to be in development by Montalvo Systems. The simulator will be also be used to investigate new low-power micro architectural models based on the arrangement of simple, in-order “mini-”cores. These models feature dynamic placement of pre-dispatched instructions within statically issued cores. This micro architecture promises a high-degree of run-time parallelism with lower power and complexity compared to aggressive hardware designs. A Synergistic Approach To Adaptive Power Management
David Brooks, et al.
Harvard University, USA Achieving power-efficient computing is a fundamental concern across a range of environments from large data centers to battery-powered mobile devices. Traditional hardware and software power management schemes are not responsive enough to exploit temporally fine-grained lulls in program behavior. The advent of heterogeneous multi-core computing brings both new challenges and new opportunities for solving the problem. Promising new hardware techniques for quickly adapting power usage need to be matched by a new software paradigm that is fine-grained and sensitive both to the behavior of individual program threads and the details of the environment in which they operate. We propose a new approach to Dynamic Voltage and Frequency Scaling (DVFS) for future CMP systems using dynamic runtime environments. The ultimate dynamic runtime environment is a management system that co-exists with the operating system, but one that monitors and dynamically modifies the instruction streams of executing threads. It will continuously tailor the code of executing programs to meet application- and system-level power budgets. We will design and evaluate a prototype dynamic runtime environment aimed at making sure the amount of power consumed by each executing thread is proportional to its demands on the system. Building a Building-scale Power Analysis Infrastructure
Phil Levis, Christos Kozyrakis, Nick McKeown
Stanford University, USA We argue that current power conservation research and development is hampered by a lack of comprehensive data that crosses many scales. We propose designing and deploying a dense sensor network for power analysis in Gates Hall, the computer science building at Stanford University. The network will consist of off-the-shelf commercial power monitors, custom high fidelity wireless sensors, virtual power monitors based on power modeling techniques, and software monitors that track system utilization. This network will monitor the power consumption of a full spectrum of electronics, including end-user systems, back-end systems, and the networking infrastructure. Additionally, it will monitor the utilization and configuration of the measured systems, to enable correlation between system use and power consumption. We will make all collected data available as a public resource to the research community and later in the project will organize a workshop for users of the data to compare and discuss their findings. Our broader goal is to generate the comprehensive insights that can guide power research across system types and scales (individual system, data center, networking infrastructure, hardware and software). Control-Theoretic Power and Performance Management for Green Data Centers
Xiaorui Wang
University of Tennessee, USA This project aims to develop a control-theoretic framework for integrated power and performance control. Current solutions to power and performance control for data centers approach the problem in two ways. Performance-oriented solutions at the system level focus on meeting application-level service-level agreements (SLAs) without any explicit control of power consumption. Power-oriented solutions treat power as the first-class control target by adjusting hardware power/performance states with no regard to the SLAs of the application services on the servers. As a result these solutions cannot simultaneously provide guarantees on both application-level performance and underlying power consumption. Integrated power and performance control becomes even more challenging with today's popular virtualization technologies. Server virtualization can consolidate application servers previously running on multiple physical servers onto a single physical server, effectively reducing energy consumption of a data center by shutting down other servers. However, application servers on the same physical server are correlated because transition of power/performance states of any hardware component in the physical server will affect the performance of all application servers. As a result, advanced multi-input-multi-output (MIMO) control algorithms have to be developed to simultaneously control the performance of all application servers and the power consumption of the physical server in virtualized server environments. The results of this work would generate a holistic management framework which simultaneously controls power consumption and application-level SLAs with theoretical guarantees on both. This cross-layered framework features a constrained MIMO control model to manage virtualized server environments. In sharp contrast to traditional solutions that heavily rely on heuristics, our framework adopts a rigorous design methodology which is based on a control-theoretic foundation for systematically developing control strategies with analytic assurance of control accuracy and system stability. Our framework would provide an effective solution to integrated power and performance control in virtualized data centers. Power Aware Computing RFP
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