MS-ManiC
MS-ManiC (Memory Systems for Many Cores) project is focused on designing scalable memory system architectures for future many-core processors. The memory system is not only one of the major performance bottlenecks in chip multiprocessors, but its design can lead to serious energy inefficiency, unpredictability, and security holes. Our goal is to design scalable and balanced memory systems using a holistic hardware/software approach. We are interested in designing a high-performance, energy-efficient, and secure memory system that at the same time provides quality of service to applications utilizing it.
Groups
Publications
- Onur Mutlu and Thomas Moscibroda,
"Parallelism-Aware Batch-Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems"
to appear in Proceedings of the 35th Annual IEEE/ACM International Symposium on Computer Architecture (ISCA), Beijing, China, June 2008. - Onur Mutlu and Thomas Moscibroda,
"Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors"
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pages 146-158, Chicago, IL, December 2007. - Thomas Moscibroda and Onur Mutlu,
"Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems"
Proceedings of the 16th USENIX Security Symposium (USENIX SECURITY), pages 257-274, Boston, MA, August 2007.