ASPLOS XIII, March 1-5, Seattle, WA
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Thirteenth International Conference on
Architectural Support for Programming Languages and Operating Systems
(ASPLOS '08)


Author/Presenter Instructions
  • The ASPLOS XIII poster session will be held during the ASPLOS welcome reception on Sunday, March 2nd at the Bell Harbor International Conference Center in Seattle, WA, from 7-9pm.
  • Presenters should arrive 20-30 minutes in advance to setup their posters.
    • Easels, poster boards (providing a total area of 44 inches wide by 28 inches tall), and push pins will be provided for presenters during the setup period. Presenters should bring their presentation on multiple, standard-sized, sheets of paper. Presenters will attach these sheets to the boards provided for their presentation
  • Student authors/presenters are encouraged to apply for travel support. See the information on Travel Grants.
Posters Accepted for Presentation at ASPLOS 2008
  • COVERT: Configurable Virtual Redundancy with Transparent Availability on Commodity Software Author/Presenter: Nidhi Aggarwal, Univ. of Wisconsin
    Co-Authors: Norm Jouppi and Parthasarathy Ranganathan, HP Labs; James Smith and Kewal Saluja, Univ. of Wisconsin
  • A Virtual Channel Mechanism for Memory Controller Design in the Multicore Era
    Author/Presenter: Yungang Bao, Chinese Academy of Sciences, China
    Co-Authors: Mingyu Chen and Jianping Fan, Chinese Academy of Sciences, China
  • MemCrawler: Discovering Structures in Memory
    Author/Presenter: Ellick Chan, Univ. of Illinois
    Co-Authors: Francis David, Jeff Carlyle, and Roy Campbell, Univ. of Illinois
  • An MP Architectural Exploration Vehicle Using Complexity-Effective FPGA-accelerated Simulation
    Author/Presenter: Eric Chung, Carnegie Mellon Univ.
    Co-Authors: Michael Papamichael, Enriko Nurvitadhi, James Hoe, Babak Falsafi, and Ken Mai, Carnegie Mellon Univ.
  • QInject: A Virtual Machine based Fault Injection Framework
    Author/Presenter: Francis David, Univ. of Illinois
    Co-Authors: Ellick Chan, Jeffrey Carlyle, and Roy Campbell, Univ. of Illinois
  • Improving Cache Performance by Avoiding Hasty Replacements
    Author/Presenter: Kaveh Jokar Deris, Univ. of Victoria, Canada
    Co-Authors: Amirali Baniasadi, Univ. of Victoria, Canada
  • A Software Controlled Cache Eviction Technique to Enhance Shared Cache Communications in Multicore Processors
    Author/Presenter: Sevin Fide, UC Irvine
    Co-Authors: Stephen Jenks, UC Irvine
  • Out of Context Level 2 Cache Prefetching
    Author/Presenter: David Fritz, Oklahoma State Univ.
    Co-Authors: Wira Mulia and Sohum Sohoni, Oklahoma State Univ.
  • LRU: If It Ain't Broke, Don't Fix It
    Author/Presenter: Lisa Hsu, Univ. of Michigan
    Co-Authors: Steve Reinhardt, Reservoir Labs/Univ. of Michigan; Trevor Mudge, University of Michigan
  • Performance Balancing: An Adaptive Helper-Thread Execution for Many-Core Era
    Author/Presenter: Kenichi Imazato, Kyushu Univ., Japan
    Co-Authors: Naoto Fukumoto, Koji Inoue, Kazuaki Murakami, Kyushu Univ., Japan
  • Object oriented programming assisted by Hardware
    Author/Presenter: Chen Tianzhou, Zhejiang Univ., China
    Co-Authors: Huang Jiangwei, Shi Qingsong, and Felix Guo, Zhejiang Univ., China
  • Fast Performance Estimation of Solid State Disk Reflecting Real Environments
    Author/Presenter: Do Yeun Kim, Korea Univ., Korea
    Co-Authors: Jong Sung Lee and Sung Woo Chung, Korea Univ.; Chanik Park, Samsung Electronics Co.; Eui-Young Chung, Yonsei Univ., Korea
  • Channels and Brokers: Coordinated Management Across Hardware and Software in Virtualized Systems
    Author/Presenter: Sanjay Kumar, Georgia Tech
    Co-Authors: Vanish Talwar and Partha Ranganathan, HP Labs; Ripal Nathuji and Karsten Schwan, Georgia Tech
  • Evaluation of Memory Hardware Failures Based on Real Error Traces
    Author/Presenter: Xin Li, Univ. of Rochester
    Co-Authors: Michael Huang and Kai Shen, Univ. of Rochester
  • Reducing Energy and Delay for Large-Scale Monitoring in Sensor Networks
    Author/Presenter: Michael Lyons, Harvard Univ.
    Co-Authors: Adam Kirsch and David Brooks, Harvard Univ.
  • An SoC Based Dual OS Architecture
    Author/Presenter: Jijun Ma, Zhejiang University, China
    Co-Authors: Chen Tianzhou, Nan Zhang, Zhejiang Univ., China
  • Towards Transactional Speculative Memory Access in a Dataflow Machine
    Author/Presenter: Leandro Marzulo, Univ. Federal do Rio de Janeiro, Brazil
    Co-Authors: Felipe Franca, Univ. Federal do Rio de Janeiro, Brazil; Vitor Costa Univ. do Porto, Portugal
  • Coevolution of Operating Systems and Asymmetric Single-ISA CMPs
    Author/Presenter: Jeffrey Mogul, HP Labs
    Co-Authors: Jayaram Mudigonda, Nathan Binkert, Partha Ranganathan, Vanish Talwar, HP Labs
  • FeS2: A Full-system Execution-driven Simulator for x86
    Author/Presenter: Naveen Neelakantam, Univ. of Illinois
    Co-Authors: Colin Blundell, Univ. of Pennsylvania; Joe Devietti, Univ. of Washington; Milo Martin, Univ. of Pennsylvania; Craig Zilles, Univ. of Illinois
  • Rename Register Cache Support for Open MP
    Author/Presenter: Aswin Ramachandran, Oklahoma State Univ.
    Co-Authors: Louis G. Johnson, Oklahoma State Univ.
  • Full-System Critical Path Analysis
    Author/Presenter: Ali Saidi, Univ. of Michigan
    Co-Authors: Nathan Binkert, HP Labs, Steven Reinhardt, Reservoir Labs/Univ. of Michigan, Trevor Mudge, Univ. of Michigan
  • DIMM: Architecture Support for Data Isolation and Memory Monitoring
    Author/Presenter: Arvindh Shriraman, Univ. of Rochester
    Co-Authors: Sandhya Dwarkadas, Univ. of Rochester
  • Efficient Fault Tolerance in Multi-media Applications through Selective Instruction Replication
    Author/Presenter: Ayswarya Sundaram, Cal Poly Univ.
    Co-Authors: Ameen Akel, Cal Poly; Derek Lockhart, Cornell Univ.; Darshan Thacker, UC Davis; Diana Franklin, UC Santa Barbara
  • TPM + Internet Virtual Disk + Platform Trust Services = Internet Client
    Author/Presenter: Kuniyasu Suzaki, National Institute of Advanced Industrial Science and Technology, Japan
    Co-Authors: Kengo Iijima, Toshiki Yagi and Nguyen Anh Quynh, National Institute of Advanced Industrial Science and Technology, Japan; Megumi Nakamura and Seiji Muhetoh, IBM Japan
  • Multi-host I/O sharing by using I/O virtualization technology, ExpEther
    Author/Presenter: Jun Suzuki, NEC Corporation, Japan
    Co-Authors: Yoichi Hidaka, Junichi Higuchi, Takashi Yoshikawa, Atsushi Iwata, System Platforms Research Laboratories, NEC Corporation
  • Operating System Support for FPGA-Based Hardware Accelerator
    Author/Presenter: Bin Xie, Zhejiang Univ., China
    Co-Authors: Tianzhou Chen and Like Yan, Zhejian Univ., China
  • Shared Resource Control in Multi-Core Processors
    Author/Presenter: Xiao Zhang, Univ. of Rochester
    Co-Authors: Sandhya Dwarkadas and Kai Shen, Univ. of Rochester



ASPLOS-XIII is sponsored by:
ACMSIGARCH, SIGPLAN and SIGOPS

Corporate supporters:



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