ACM SIGGRAPH 1999 Proceedings, 269-276.
Face reordering for efficient GPU vertex cache, advocating a FIFO policy.
Abstract: Bus traffic between the graphics subsystem and memory can become a bottleneck when rendering geometrically complex meshes. In this paper, we investigate the use of vertex caching to transparently reduce geometry bandwidth. Use of an indexed triangle strip representation permits application programs to animate the meshes at video rates, and provides backward compatibility on legacy hardware. The efficiency of vertex caching is maximized by reordering the faces in the mesh during a preprocess. We present two reordering techniques, a fast greedy strip-growing algorithm and a local optimization algorithm. The strip-growing algorithm performs lookahead simulations of the cache to adapt strip lengths to the cache capacity. The local optimization algorithm improves this initial result by exploring a set of perturbations to the face ordering. The resulting cache miss rates are comparable to the efficiency of the earlier mesh buffer scheme described by Deering and Chow, even though the vertex cache is not actively managed.
Hindsight: This technology has been transferred into the D3DX library of Microsoft DirectX (see ID3DX10Mesh::Optimize). We observe that optimizing meshes for vertex caching results in useful speedups on modern GPU's. Some recent schemes including Lin and Yu 2006 and Chhugani and Kumar 2007 achieve better vertex caching behavior, but replace indexed triangle strips by indexed triangle lists, which slightly increases the size of the index buffer. The scheme of Sander et al 2007 is very fast and also considers occlusion culling.
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