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554 BIBLIOGRAPHY

[Bell and Newell, 1970] Bell, C.G., and A. Newell: The PMS and ISP Descriptive Systems for Computer Structures. AFIPS Conf Proc. SJCC 36:351-374, 1970.

[Bell and Freeman. 1971] Bell. C.G., and P. Free man: Cai-A Computer Architecture for Al Re search. AFIPS Conf Proc. SJCC. 38:779-790, Spring 1971.

[Bell and Casasent, 1971] Bell, C.G.. and D. Casasent: Implementation of a Buffer Memory in Minicomputers. Computer Design, pp. 83-89, Nov. 1971.

[Bell and Grason, 1971] Bell, C.G., and J. Grason: Register Transfer Module Design Concept. Computer Design, pp. 87-94, May 1971.

[Bell and Newell, 1971] Bell, C.G., and A. Newell: Computer Structures. Readings and Examples. New York, McGraw-Hill, 1971.

[Bell and Newell, 1971a] Bell, C.G., and A. Newell: A Panel Session - Computer Structure - Past, Present and Future, Possibilities for Computer Structures. AFIPS Conf Proc. FJCC39:387-396, 1971.

[Bell et al., 1971] Bell, C.G., P. Freeman, M. Barbacci, S. Bhatio, and W. Broodle: A Computing Environment for AI Research - Overview, PMS, and Operating System Considerations. Carnegie- Mellon University, Department of Computer Science, AD-737 531, Pittsburgh, technical report, May 1971.

[Bell et al., 1972] Bell, C.G., J. Grason, S. Mega, R. Van Naarden, and P. Williams: The Description and Use of the DEC Register Transfer Modules (RTMs). IEEE Trans. Comput., pp. 495, May 1972.

[Bell et al., 1972a] Bell, C.G., J. Grason, and A. Newell: Designing Computers and Digital Systems Using PDP-16 Register Transfer Modules. May nard, Mass., Digital Press, 1972.

[Bell et al., 1972b] Bell, C.G., R. Chen, S. Rege: Effect of Technology on Near-Term Computer Structures. IEEE Comp. 5(2)29-38, March- April, 1972.

[Bell, J., 1973] Bell, J.R.: Threaded Code. Commun. ACM 16(6):370-372, June 1973.

[Bell, et al., 1973] Bell, C.G., R.C. Chen, S.H. Fuller, J. Grason, S. Rege, and D.P. Siewiorek: The Architecture and Applications of Computer Modules: A Set of Components for Digital Design. IEEE Compcon 73:177-180. March 1973.

[Bell et al., 1974] Bell, J., D. Casasent, and C.G. Bell: An Investigation of Alternative Cache Organizations. IEEE Trans. Comput. C-23(4):346-3 51, April 1974.

[Bell and Strecker, 1976] Bell, C.G., and W.D. Strecker: Computer Structures: What Have We Learned from the PDP-11? Proc. Conference. 3rd Annual Symposium on Computer Architecture, IEEE and ACM, 1976.

[Bell Laboratories, 1975] Bell Laboratories: The Safeguard Data-Processing System: An Experiment in Software Development. Bell Syst. Tech. J., special supplement, 54:S199-S210, 1975.

[Best, 1957] Best, R.L.: Memory Units in the Lincoln TX-2, Proc. WJCC, pp. 160-167, 1957.

[Bhandarkar, 1978] Bhandarkar, D. P.: Dynamic MOS Memories: Serial or Random Access? IEEE Compcon Digest of Papers, pp. 162-164, Feb. 1978.

[Blaauw, 1970] Blaauw, G.A.: Hardware Requirements for the Fourth Generation. In Fourth Generation Computers. User Requirements and Transition, F. Gruenberger (ed.), Englewood Cliffs, N. J., Prentice-Hall, pp. 155-168, 1970.

[Blaauw and Brooks, in preparation] Blaauw, G.A., and F.P. Brooks, Jr.: Computer Architecture, in preparation.

[Bobrow et al., 1972] Bobrow, D.G., J.D. Burchfiel, DL. Murphy, and R.S. Tomlinson: TENEX, A Paged Time Sharing System for the PDP-l0. Comm. ACM 15(3):135-143, March 1972.

[Buchholz, 1962]Buchholz, W. (ed.): Planning a Computer System. IBM Corp. New York, McGraw-Hill, 1962.

[Bullman, 1977] Bullman, D.M. (ed.): Stack Computers. IEEE Comput. 10(5):14-52, May 1977.

[Burks et al., 1962] Burks, A.W., H.H. Goldstine, and J. Von Neumann: Preliminary Discussion of the Logical Design of an Electronic Computing Instrument, pt. II. Datamation 8(10):36-41, Oct. 1962.

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