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Using LSI Processor Bit-Slices to Build a PDP-11 - A Case Study

in Microcomputer Design

THOMAS M. McWILLIAMS, SAMUEL H. FULLER, and WILLIAM H. SHERWOOD

INTRODUCTION

Several semiconductor manufacturers have recently developed high speed LSI circuits that are designed to simplify the construction of microprogrammed processors and device controllers. These integrated circuits are called "bit-slices" because they implement 2 or 4 bits of the registers, arithmetic units, and primary data paths of a processor. This article presents the design and evaluation of the processor built at Carnegie-Mellon University [Fuller et al., 1976] that uses the Intel 3000 bit-slices [Intel, 1975; Signetics, 1975] and that is microprogrammed to emulate the PDP-11 computer architecture [DEC, 1973].* The purpose of this project was to investigate the assertions of semiconductor manufacturers that their LSI bit- slices would in fact simplify the design and construction of processors.

Rather than specify a new architecture (i.e., instruction set) for this experiment in processor design, we decided to reimplement an established computer architecture: the PDP-l 1. We chose the PDP-11 architecture for several reasons. Using an existing and well-known architecture allowed others to more easily evaluate the results of our experiment and kept us from consciously or unconsciously tailoring the processor architecture to fit the capabilities and idiosyncrasies of the LSI bit-slices. PDP-11s are in extensive use at Carnegie-Mellon University in a wide variety of applications and, if our experiment was successful, the processor could be put to work on any one of several practical tasks. It was this second reason that helped establish a criterion that proved to be critical: we demanded that the processor we constructed sup port the standard DEC Unibus [DEC, 1973] that is common to all PDP-11s except the LSI-11 [DEC, 1975]. Finally, the PDP-11 architecture is an unusually good test of the capabilities of a bit-slice circuit family because it is a relatively complete architecture with numerous addressing modes and instruction formats.

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*We gratefully acknowledge the donation of 3000 microcomputer sets by both Intel and Signetics Corporations.

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