Chapter 30 A command structure for complex information processing 353

Figure 3 shows the special registers of the machine and the main information transfer paths. Four addressable registers accomplish fixed functions. These are shown as part of the main memory, but would be fast access registers.

Communication list, L₀. The system allows the introduction of unlimited numbers of processes with variable numbers of inputs and outputs. The communication of inputs and outputs among processes is centralized in a communication list with known name, L₀. All subroutines find their inputs on this list, and all subroutines put their outputs on the same list.

Available space list, L₁. All cells not currently being used are on the available space list: cells can be obtained from it when needed and are returned to it when they are no longer being used.

List of current instruction addresses (CIA), L₂. At any given moment in working sequentially through a program, there will be a whole hierarchy of instructions that are in process or interpretation, but whose interpretation has not been completed. These will include the instruction currently being interpreted, the routine to which this instruction belongs, the superroutine to which this routine belongs, and so on. The CIA list is the list of addresses of this hierarchy of routines. The first symbol on the list gives the address of the instruction currently being interpreted; the second symbol gives the address of the current instruction in the next higher routine, etc. In this system it proves to be preferable to keep track of the current instruction being interpreted, rather than the next one.

List of current CIA lists, L₃ . The control sequence is complicated in this computer by the existence of numerous programs which become active when called upon, and whose processing may be interspersed among other processes. Hence, a single CIA list does not suffice; there must be such a list for each program that has not been completely executed. Therefore, it is necessary also to have a list that gives the names of the CIA lists that are active. This list is L₃.

Besides these special addressable registers, three nonaddressable registers are needed to handle the transfers of information. Two of these, R₁ and R₂, are each a full word in length, and transfer information to and from memory. Register R₁ receives input from memory; R₂ transmits output to memory. The comparator that provides the information for all tests takes as its input for comparison the symbols in R₁ and R₂. This pair of registers also performs a secondary function in regenerating words in memory: the basic "read" operation from memory is assumed to be destructive; a nondestructive "read" merely shunts the word received from memory in R₁ to R₂ and back, by means of a "write" operation, to the same memory cell.

A register, A, which holds a single address, controls references to the memory, that is, specifies the memory address at which a "read" or "write" operation is to be performed. References to the four addressable registers, L₀ to L₃, can be made either by A or directly by the control unit itself; other memory cells can be referred to only by A. Finally, the computer has a single bit register which is used to encode and retain test results.