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330 Part 4 The instruction-set processor level: special-function processors

Section 2 Processors for array data

APPENDIX 1
A1. CLASSIFIED LIST OF CU INSTRUCTIONS

A1.1 Data transmission

ALIT Add literal (24 bit) to CAR.

BIN Block fetch to CU memory.

BINX Indexed (by PE index) block fetch.

BOUT Block store from CU memory.

BOUTX Indexed block store.

CLC Clear CAR.

COPY Copy CAR into CAR of other quadrant.

DUPI Duplicate inner half of CU memory address contents into both halves of CAR.

DUPO Duplicate outer half of CU memory address contents into both halves of CAR.

EXCHL Exchange contents of CAR with CU memory address contents.

LDL Load CAR from CU memory address con tents.

LIT Load CAR with 64-bit literal following the instruction.

LOAD Load CU memory from contents of PE memory address found in CAR.

LOADX Load CU memory from contents of PE memory address found in CAR, indexed by PE index.

ORAC OR all CARS in array and place in CAR.

SLIT Load CAR with 24-bit literal.

STL Store CAR into CU memory.

STORE Store CAR into PE memory.

STOREX Store CAR into PE memory, indexed by PE index.

TCCW Transmit CAR counterclockwise between CUs in array.

TCW Transmit CAR clockwise between CUs in array.

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