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604 Part 3 ½Computer Classes Section 1½ Monolithic Microcomputers

Descriptions of these various elements appear in the following sections.
 

II. Mp State

The Program ROM contains 6144 bits organized as 512 twelve-bit words. RAM storage consists of 32 eight-bit registers, all of which are addressable by instructions contained in the program ROM. These registers are divided into two functional groups: operation al registers and general-purpose registers. The general registers are addressed as F9 to F31 and contain data and control information. These registers are all located in a contiguous block labeled "Register File Array" in Fig. 1. The operational registers, F0 to F8, are scattered throughout the chip, and not only are they addressable by the program, but they also perform special functions described in Sec. III of this chapter.

III. Pc State

The register file arrangement is delineated as follows:

a F0. F0 is not a physically implemented register. Rather, it is used as an indirect register-select mechanism; when F0 is specified in the register file field of an instruction, the PIC will use the contents of F4 to select the register to be used in that instruction.

b F1<7:0>\Real.Time. Clock. Counter. Register. This register counts external events by incrementing on the falling edge of the RTCC pin. This register can also be loaded and read under program control.

c F2<8:0>\Program.Counter (PC). The program counter points to the next instruction to be executed in memory. This register is 9 bits wide to address the 512-word ROM, but only the low-order 8 bits can be written to or read from
 
 

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