Chapter30 ½ The SYMBOL Computer 491
Processor to Processor transfers
Control exchange cycles
Control exchange cycles are used to communicate control information
between the SS and the various processors over the data and address buses.
See Fig. 3. During a control cycle the data and address bus lines have
preassigned uses. Certain lines are used to start the CP. Others indicate
the completion mode for the TR. During a given cycle any combination of
the paths can be used. The SS has autonomous interface control functions
that are used to communicate with the processors during control cycles
so that more than one control signal can be transmitted during a given
cycle.
Memory Organization
Virtual Memory
The SYMBOL memory is organized as a simple two-level, fixed page size virtual memory [Kilburn et al., 1962]. The page has 256 words with each word having 64 bits. Virtual memory is accessed by a 24 bit address with 16 bits used to select the page and 8 bits to select a particular word within a page. See Fig. 4.
The main memory for the experimental system is logically divided into 32 pages. The relative portion of the address is used directly while the page number accesses an associative memory which in turn supplies the current page address in main memory.
The associative memory has one cell for each page in the main memory. By providing an associative memory tied to the main memory the individual processors need not be concerned with the location association process. This provides a significant reduction in the logical complexity of the processors even though it may lead to slightly more overall electronics.
The paging disk memory has fixed assignment of page locations.
