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Chapter 22

The C.mmp/Hydra Project: An Architectural Overview

Henry H. Mashburn

Summary This article describes the C.mmp/Hydra project at Carnegie-Mellon University. Included are detailed descriptions of the PMS structure of C.mmp (a multiprocessor built from minicomputers) and its major components. An overview of its operating system, Hydra, is provided with emphasis on those sections most concerned with and influenced by the architecture. The project is also discussed in terms of performance, reliability, programming methodologies, and problems encountered.

In 1971 the Computer Science Department at Carnegie-Mellon University (CMU) undertook a project to construct C.mmp (Computer. multi-mini-processor), a relatively large-scale multiprocessor, from minicomputers. A number of project goals and criteria influenced the design:

To provide the necessary programming environment, a novel operating system was proposed, its principal component being its kernel, Hydra [Wulf, Cohen, Corwin, Jones, Levin, Pierson, and Pollack, 1974; Wulf, Levin, and Pierson, 1975]. The following criteria were used in designing the operating system:

The resulting C. mmp/Hydra-system has been completed and has met these goals. It has been running as a general departmental resource since mid-1975, supporting a time-shared user community as well as large-scale computing tasks, such as speech: understanding systems.

Table 1 summarizes the basic hardware and performance of C.mmp.

The Hardware: C.mmp

C.mmp is an asynchronous, multiple-instruction stream, multiple-data stream (MIMD) multiprocessor. To achieve the goal of symmetry, the processors and primary memory (Mp) are connect-

Table 1 C.mmp Hardware Summary
Structure  Symmetric, central cross-point-connected MIMD multiprocessor allowing up to 16 Pc's and 16 memories.
Processors PDP-11 models 11/20 or 11/40, in any mix. A 16-Pc configuration of 11/20's and 11/40's was built. Eleven 11/40 models are currently in use.
Shared memory 32-Mbyte total shared address space. 2.7 Mbyte implemented using both core and MOS.
Secondary storage 700 Mbyte total moving-head disks. 6 Mbyte total fixed-head paging disks.
Performance 4.3 MIPS for 11/40 configuration, 3.0 MIPS for current 11/40 configuration. 26.3 x 106 references/s total memory bandwidth.


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