A_0-3

The four address inputs to the register stack used to select one register whose contents are displayed through the A port.

B_0-3

The four address inputs to the register stack used to select one register whose contents are displayed through the B port and into which new data can be written when the clock goes LOW.

I_0-8

The nine instruction control lines to the Am2901, used to determine what data sources will be applied to the ALU (I_0,1,2), what functions the ALU will perform (I_3,4,5), and what data is to be deposited in the Q register or the register stack (I_6,7,8).

O₃, RAM₃

A shift line at the MSB of the Q register (Q₃) and the RAM₃ register stack (RAM₃). Electrically these lines are three-state outputs connected to TTL inputs internal to the Am2901. When the destination code on I_6,7,8 indicates an up shift (octal 6 or 7), the three-state outputs are enabled and the MSB of the Q register is available on the Q₃ pin and the MSB of the ALU output is available on the RAM₃ pin. Otherwise, the three-state outputs are OFF (high-impedance) and the pins are electrically LS-TTL inputs. When the destination code calls for a down shift, the pins are used as the data inputs to the MSB of the Q register (octal 4) and RAM (octal 4 or 5).

O₀, RAM₀

Shift lines like Q₃ and RAM₈, but at the LSB of the Q register and RAM. These pins are tied to the Q₃ and RAM₃ pins of the adjacent device to transfer data between devices for up and down shifts of the Q register and ALU data.

D_0~3

Direct data inputs. A 4-bit data field which may be selected as one of the ALU data sources for entering data into the Am2901. D₀ is the LSB.

Y_0-3

The four data outputs of the Am2901. These are three-state output lines. When enabled, they display either the four outputs of the ALU or the data on the A port of the register stack, as determined by the destination code I_6,7,8.

OE

Output enable. When OE is HIGH, the Y outputs are OFF; when OE is LOW, the Y outputs are active (HIGH or LOW).

P, G

The carry generate and propagate outputs of the Am2901's ALU. These signals are used with the Am2902 for carry-lookahead. See Table 7 for the logic equations.

OVR

Overflow. This pin is logically the Exclusive-OR of the carry-in and carry-out of the MSB of the ALU. At the most significant end of the word, this pin indicates that the result of an arithmetic 2's complement operation has overflowed into the sign bit. See Table 7 for logic equation.

F = 0

This is an open-collector output which goes HIGH (OFF) if the four ALU outputs F_0~3 are all LOW. In positive logic, it indicates the result of an ALU operation is 0.

C_n

The carry-in to the Am2901's ALU.

C_n+4

The carry-out of the Am2901's ALU. See Table 7 for equations.

CP

The clock to the Am2901. The Q register and register stack outputs change on the clock LOW-to-