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Chapter 12½ Microprogramming the IBM System/360 Model 30 167

register pair I and J is assumed to hold the program counter. The register pairs UV and LT are used to formulate the storage addresses of the two operands. In this case the operands are registers assumed to be in local memory.
 
Address Location in figure Description
"1161 C1 The program counter IJ addresses main storage. The addressed byte in main storage is read out into the storage data register R. The program counter is updated by adding 1 to register J. A possible carry is saved to be added to I.
"1117 C2 The op code has been read from main storage into R. It is also transferred (through the ALU) to register G. A four-way branch occurs on the two highest bits R0 and R1 of the op code. For the RR op codes (i.e., Branch, Status Setting, Fixed- Point Fullword, Logical, Floating-Point Long, and Floating-Point Short), this branch goes to ROS word "1171. Other instruction formats branch to "1170, "1172, or "1173, indicated by the three lines not continued.
"1171 C3 To complete the updating of the program counter, the carry from "1117 is added into I. Op code decoding continues on the next two bits of the op code. RR format Fixed-Point Fullword and Logical instructions branch to ROS address "115C.
"115C  C4 The second byte of the instruction is read from main store into register R. The program counter IJ is again incremented. Decoding of the op code continues. The RR format instructions AND, Compare Logical, OR, and XOR branch to ROS address "11C5.
"11C5 C5 Update of the program counter is completed. The RR format instruction OR branches to ROS address "11 CA.
"11CA, "11D0 C6, C7 Decoding of register operand R1.
"11D5, "11DA C8, C9 Fetch of the first byte of R1 from Local Store; decoding of register operand R2.
"11E1, "11E4 E1, E2 Fetch of the first byte of R2 from Local Store.
"11E5 E3 The OR of the first bytes of R1 and R2 is formed.
"11E6, "11E7 E4, E5 The results of the first byte are stored back into R1. The pointer to R2 is incremented in preparation for fetching the second byte of R2.
"11EB, "11E9, "11EA, "11EB E6, E7 
E8, E9 
The second byte of R2 is fetch from Local Store, the pointer to R1 is incremented, and the second byte of R2 is fetched from Local Store. To complete the OR instruction, the cycle from ROS address "11E5 through "11 E8 would have to be repeated until all four bytes of the final operand were computed.

References

Weber [1967]; Fagg, Brown, Hipp, Doody, Fairclough, and Greene [1964]; Green [1966].

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