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12, for example, which has only the primitives READ and WRITE).

Clocks. In the case of complex data paths there will be microoperations that do not require the worst-case time (usually defined by the time to transit the data-path loop completely) to execute. By having multiple-microcycle clocks selectable by the microinstruction, each microinstruction need only specify the minimum time required to complete rather than the worst-case time. (See Chap. 39 for an example of the use of multiple clocks.)

Target-Instruction Decoding. The primary use of microprogramming is to emulate a target ISP. One of the most important aspects of emulation is quickly arriving at the unique microcode sequence required to emulate the target instruction. The sequence can be arrived at by sequentially testing bits of the op code (see Chap. 12), by using the op code as a unique microroutine address, or by using the op code to index a ROM or PLA containing the microroutine address (see Chapter 39).

Modification of Microinstruction Semantics. In order to minimize the number of microinstructions it is desirable to have the same microsequence perform operations parameterized by fields in the macroinstruction word. Prime macroinstruction candidates would be fields that specify an ALU function and fields that specify a register (see Sec. 3 in Part 3).

Chapter 11 is an extension of an earlier paper by Wilkes. It includes an example of a microprogrammed processor. In the earlier paper, "The Best Way to Design an Automatic Computing Machine" [Wilkes, 1951], the essential ideas of microprogramming were first outlined.

The observation that an instruction set, or ISP, should be looked at as a program to be interpreted is the basis of microprogramming. The idea of an ISP is our acknowledgment that we, too, view a processor as a program.

There is little to say about this chapter; it is historical, yet timely and well written. Microprogramming, like others of Wilkes' ideas, is present in many of our computers.

Chapter 12 presents an example of an early microprogrammed implementation and should be contrasted with some of the later designs.

Bit-slice families usually have two major chip types: those dealing with data and those with control. Data chips contain ALUs, register files, and condition sensing. Control chips are usually microprogram sequencers that manipulate addresses (i.e., increment, select alternate source, and stack) rather than data. Bit slices are aimed at replacement of MSI implementations of existing ISPs and at application areas requiring large computation al power (e.g., signal processing). Bit slices have some advantages over single-chip processors:

• Flexibility. Bit-sliced chips are cascadable, allowing the user to select the length of data and/or control fields. Bit slices may take n chips to realize the data-path width of a single processor. Thus there are n times as many pins available as in a single-chip processor (assuming the same packaging technology). These extra pins can be translated into more user visibility and control of the inside of each chip.

• Speed. Chip slices usually have smaller logic density per chip, which allows more power dissipation (hence speed) per function than a single-chip processor. Of course, the extra delay of off-chip signals and their frequency of use may negate some of this advantage.

Table 2 sketches the characteristics of some bit-slice processors.

Chapters 13 and 14 discuss the Am2900 bit-sliced processor family. The first-generation data (Am2901) and control (Am2909) chips can be contrasted against the second-generation chips (Am2903 and Am2910). The chips may be studied as computer structures in their own right. However, these chips are frequently used to emulate other ISPs. An example implementation of a PDP-8 using the Am2903/2910 is given in Chap. 15.

Am2901/2909. Although bit-sliced processors predated the Am2901/2909 series (Intel 3000; see Adams [1978]), the AMD chips have quickly become the industrial standard for medium- performance computers. Figure 3 illustrates how bit slices might be interconnected to emulate another ISP.

Chapter 13 gives a thorough introduction to the Am2901 microprocessor slice and the Am2909 bit-sliced microprogram sequencer. The information is sufficiently detailed that the chip data paths can be studied as an implementation of a computer. Also, the reader is encouraged to attempt a design of ISPs in this book using the bit slices.

Am2903/2910. The 2 years between the introduction of the 2901/2909 and the 2903/2910 produced significant advances in bit-sliced architecture. The reader is encouraged to compare and contrast the chips while asking, Why was this feature added?

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