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THE DESCRIPTION AND USE OF REGISTER TRANSFER MODULES 443

Table 1. Basic RT Design Decisions

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1. Logic: TTL (acceptable for speed and noise immunity; low cost).

2. Packaging: Printed circuit boards of 5 X8-1/2 inches or 2-1/2 X 8-1/2 inches with 72 or 36 pins (DEC compatible).

3. Intermediate connection: Pre-wired buses; wire-wrap and push-on connections over wire- wrap pins.

4. Logic interconnection rules: One kind of control signal and data bus. Very small number of rules compared to IC use.

5. Problem size: 4~ 1 00 control steps; 1 ~4 arithmetic registers; 16~ 100 variables; possibly read-only memory.

6. Word length; 8-, 12-, and 16-bit (present de facto standard - can be extended).

7. Universality and extendability; The modules are not a panacea. There are provisions for escape to regular integrated circuits, standard DEC modules, and DEC computers (and their components).

8. Selection of primitives; Basic register, bus interconnection structure, and data representation were first determined. The operations that formed a complete set for the data representation were then specified. With this basic module set, designs were carried out for benchmark problems and design iteration occurred.

9. Notations; PMS and ISP of Bell and Newell [1971].

10. Automatic (algorithmic) mapping of algorithm into hardware; The basic RT design archetype representation is a flowchart. The register transfer operations are expressed in the ISP language.

11. Parallelism and speed; Provision for multiple buses; the modules are asynchronous. (The application classes put relatively low weight on speed.) For teaching purposes parallelism is an important principle. (A decision to use a bus, and thereby limit parallelism to the number of buses, was made for both cost and simplicity reasons.)

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by DM and M types. The K modules are analogous to the control structure of a program. The K modules called K.evoke control the times when the various operations of the DMs and Ms are evoked (executed). The K.branch modules are used to make decisions about which operations are to be evoked next. The K.subroutine modules are used to connect a sequence of operations together as a subroutine. K.serial-merge allows control flow to merge into a single control flow when any flow input is present. K.parallel-branch and K.parallel-merge modules synchronize control where there is more than one operation taking place at a time. Other control modules include clocks, de lays, and manual start keys.

T-Type (Transducers)

These modules provide an interface to the environment outside RTM. These include the Teletype interface, analog/digital converters, lights, switches, and interfaces to computers. These modules also connect to the common data bus.

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