DESIGN DECISIONS FOR THE PDP-11/60 MID-RANGE MINICOMPUTERS 323

does not result in a microprogrammable computer. A microprogrammable computer system should have the following:

1. Extra address space in the control store.

2. Generality in the data path's processing elements.

3. A means to load the writable control store (WCS).

4. User-oriented hardware documentation.

5. Software to support writing and debugging microprograms.

6. Integration of hardware and software protocols.

All these capabilities were designed into the 11/60 WCS option.

A previously reserved operation code, 0767XX in the PDP-l1 instruction set, has been allocated for users. Its designation is XFC, extended function code. When this code is recognized, the CPU transfers control to the upper 1024-word block of the 4096-word microprogram address space. User-written microcode may take over from there.

A second (asynchronous) type of entry to user's microcode is also provided. This occurs when a WCS-serviced interrupt is recognized by the base machine. Thus, a user can write interrupt service routines in microcode and invoke them without the usual inerrupt overhead. Such routines may even be complete I/O channel emulations.

Implementation of the basic 11/60 demonstrated flexibility of microprogramming. The techniques were used in such diverse functions as console service, error logging, floating-point arithmetic, and cache initialization.

Microprogramming does not always result in significant performance gains. Well-suited applications can gain by a factor of 5; poorly suited ones may give only minimal improvement. This is supported by measurements on digital signal processing software reported by Morris and Mudge [1977]. Prospective users must carefully analyze the execution behavior of the application to determine which parts are "hot spots," i.e., most frequently executed. For the average application, an overall factor of 2 improvement should be expected. This average, found to be a useful rule of thumb, is derived by assuming that all hot spots are micro programmed and the remainder of the program is left unchanged.

Two user-microprogramming options are available. The first is composed of the writable control store module, software tools, and associated manuals. The second is a board containing control logic and sockets ready for the insertion of custom-programmable ROMs (PROMs) containing microprograms developed with the writable control store. This extended control store (ECS) option is designed for situations where microcode integrity and/or multiple installations are required.

A novel structuring of the writable control store allows it to be used to store data. Avail ability of data storage local to a processor, i.e., not accessed through a main, general purpose memory bus, can increase system speed. Such local store is usually implemented in some special technology that has low capacity but high performance. Writable control store has been structured so that the 48-bit microinstruction storage words can be read and written as 16-bit data words. In addition to conventional writ- able control store hardware, logic is available to realize a local store address register (LSAR) and a local store data register (LSDR).

Thus, the microprogrammer has fast local store available. This storage is block-oriented. A three-cycle overhead is needed to start a block read (or block write); then, words are read (or written) at the rate of one per micro cycle. The microprogram can be logically partitioned into two sections: control store - 48-bit control words; and local store - 16-bit data words (three per microword). A common partitioning would be 512 words of control store and 1536 words of local store.