MEMOCODE  2011 Program

Day 1  (July 11)

8:00  Registration

9:00  Welcome

9:15  MSR introduction. Andrew Blake, Managing Director, Microsoft Research Cambridge.

9:30  Session 1: Modeling and implementation of Software-Hardware systems (Chair: Luca Carloni, Columbia University)

v  David Greaves and Satnam Singh. "Distributing C# methods and  threads over Ethernet-connected FPGAs using Kiwi"

v  Paraskevas Bourgos, Kai Huang, Ananda Basu, Marius Bozga,  Saddek Bensalem and Joseph Sifakis. "Rigorous System Level Modeling and  Analysis of Mixed HW/SW Systems"

10:30  Coffee Break

11:00  Invited Talk: Tony Hoare, MSR.  "Algebraic technique of classifying languages in families." (Chair: Sandeep Shukla, Virginia Tech)

12:00  Lunch

13:30  Session 2: Synthesis Techniques (Chair: Alain Girault, INRIA Grenoble)

v  Huafeng Yu, Jean-Pierre Talpin, Loic  Besnard, Thierry Gautier, Herve Marchand and Paul Le Guernic.  "Polychronous controller synthesis from MARTE's CCSL timing  specifications" 

v  Georg Hofferek and Roderick Bloem. "Controller  Synthesis for Pipelined Circuits Using Uninterpreted Functions"

v  Wenchao Li, Lili Dworkin and Sanjit Seshia. "Mining  Assumptions for Synthesis"

15:00 Poster Advertisements

15:10 Coffee Break and Poster Presentation

16:00 Session 3:  Transformation and Refinement Techniques (Chair: Daryl Stewart, ARM)

v  Andrey Mokhov, Danil Sokolov, Maxim Rykunov and Alex Yakovlev. "Formal modeling and transformations of processor instruction sets"

v  Nirav Dave, Michael  Katelman, Myron King, Arvind Arvind and  Jose Meseguer. "Verification of Microarchitectural Refinements in  Rule-based Systems"

(without a break)

17:00 Design Contest: Presentations of the design problem and winners (Chair: Derek Chiou, UT Austin)

18:30 Reception. (BBQ and punting on the River Cam). Granta Moorings (next to the Granta Riverside pub). Newham Road, Cambridge, CB3 9EX. Map and here are walking directions: http://www.cyclestreets.net/journey/892680/

 

Day 2  (July 12)

9:00  Invited Talk 2: Anna Slobodova, Centaur Technology. "A Flexible Formal Verification Framework for Industrial Scale Validation" (Chair: Barbara Jobstmann, Verimag, CNRS and University of Grenoble)

10:00  Coffee Break

10:30  Session 4: Verification Problems (Chair: Jens Brandt, University of Kaiserslautern)

v  Arnab Sinha, Sharad Malik, Chao Wang and Aarti Gupta.  "Predictive Analysis for Detecting Serializability Violations through  Trace Segmentation"

v  Bijoy  A. Jose, Abdoulaye Gamatie, Julien Ouy and Sandeep Shukla. "SMT Based  False Causal loop Detection during Code Synthesis from Polychronous  Specifications"

v  Andreas Griesmayer, Saddek Bensalem, Axel Legay, Thanh-Hung Nguyen and  Doron Peled. "Efficient Deadlock Detection for Concurrent Systems"

12:00  Lunch

14:00  Tutorial 1: Peter Sewell,  University of Cambridge. "Making Sense of Shared-Memory Concurrency: from Architecture to Programming Language" (Chair: Arvind, MIT)

15:00 Tutorial 2: Dan Ghica, University of Birmingham. "Functional interfaces in higher-level synthesis" (Chair: Michael Theobald, D. E. Shaw Research)

16:00  Coffee Break

16:30  Tutorial 3: Christopher Jefferson, University of St. Andrews. "Modern Constraint Solving by Propagation" (Chair: Giuseppe Di Guglielmo, University of Verona)

19:00 Conference Dinner. (St. John's College and location). Reception in the Old Music Room followed by dinner in the Wordsworth room at 19:30.

 

Day 3  (July 13)

9:00  Invited Talk 3: Mark Shand, Zoran. "A Case Study of Hardware Software Co-Design in a Consumer ASIC" (Chair: Satnam Singh, MSR)

10:00  Coffee Break

10:30  Session 5: Verification and simulation techniques (Chair: Ashish Darbari, ARM)

v  Ralf Wimmer, Ernst Moritz Hahn, Holger Hermanns and Bernd Becker. "Reachability Analysis for Incomplete  Networks of Markov Decision Processes"

v  Paula  Herber, Marcel Pockrandt and Sabine Glesner. "Model Checking SystemC-TLM  Designs Using Timed Automata"

v  Giovanni Funchal and Matthieu Moy. "Modeling of  Time in Discrete-Event Simulation of Systems-on-Chip"

12:00  Lunch

13:00  Session 6: Testing, debug, and assertion-based validation (Chair: Andreas Griesmayer, Imperial College London)

v  Daniel Schwartz-Narbonne, Feng Liu, Tarun Pondicherry, David  August and Sharad Malik . "Parallel Assertions for Debugging  Parallel Programs"

v  Lingyi Liu, David Sheridan, Viraj Athavale and Shobha  Vasudevan. "Automatic generation of assertions from system level design using data mining" 

v  Giuseppe Di Guglielmo, Masahiro Fujita, Franco Fummi, Graziano  Pravadelli and Stefano Soffia. "EFSM-based Model-driven Approach to  Concolic Testing of System-Level Design"

14:30  End of Conference wrap-up (approx. 10 minutes)