Hardware performance analysis using the Critical Path
Theory and practice for performance analysis of concurrent hardware.
Overview
The Dynamic Critical Path is the longest chain of events in the timed-graph. (The timed graph models the time-evolution of a circuit.) Analyzing the critical path can offer important insights about the bottlenecks of a circuit. We have built automatic tools which extract, summarize, analyze the critical path, and use it to optimize circuits. 
Project Members
- Girish Venkataramani, intern 2005
- Hari Kannan, intern 2008
- Mihai Budiu
Publications
- Critical Path: A Tool for System-Level Timing Analysis, Girish Venkataramani, Tiberiu Chelcea, Mihai Budiu, and Seth C. Goldstein, Design Automation Conference (DAC), San Diego, CA, June 4-8, 2007.
- Slides describing the application to asynchronous circuits.
