Samin Ishtiaq
SENIOR RSDE
.
I'm an RSDE in the Programming Principles and Tools group at Microsoft Research Cambridge, working on the SLAyer and TERMINATOR projects. I joined MSR in April 2008.
I worked for ARM 2000-2008 in the modelling and CPU verification group. I developed special purpose compilers/simulators, Random Instruction Sequence generators, Debug/Trace comparators, the AMBA bus protocol checker, and lots of ARM assembler tests that ran on bare metal.
I have an MEng from Imperial and a PhD in dependent type theory from Queen Mary. I was an RA on the original Verifiied Bytecode project.
Publications
- Jade Alglave, Anthony Fox, Samin Ishtiaq, Magnus O. Myreen, Susmit Sarkar, Peter Sewell, and Francesco Zappa Nardelli, The Semantics of Power and ARM Multiprocessor Machine Code, in Workshop on Declarative Aspects of Multicore Programming, 2009
- Nathan Chong and Samin Ishtiaq, Reasoning about the ARM weakly consistent memory model, in ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, 2008
- Nathan Chong and Samin Ishtiaq, Functional Programming for Hardware Definition, Verification and Modelling, in Hardware Design and Functional Languages , 2007
- Samin Ishtiaq, Verification of the AMBA Protocol, in IEEE 7th International Workshop on Microprocessor Test & Verification, 2006
