jooyoung at microsoft dot com
CV (updated: June 2014)
I'm a Senior Research Hardware Design Engineer in the Microsoft Research Technologies (MSR-T) lab. I joined Microsoft Research in 2012, after receiving the Ph. D degree in Electrical Engineering from Korea Advanced Institute of Science and Technology (KAIST) in 2010. My research focuses on high performance yet energy efficient hardware architectures for the cloud/mobile computing era. I'm broadly interested in,
- Computer architecture and digital system design
- Hardware acceleration for compute intensive workloads (computer vision, augmented reality, data compression, image compression, machine learning)
- FPGA system design for large-scale data centers
- Low power System-on-Chip (SoC) implementation
If you want to see my full publications, please visit my personal homepage.
- Kalin Ovtcharov, Olatunji Ruwase, Joo-Young Kim, Jeremy Fowers, Karin Strauss, and Eric Chung, Toward Accelerating Deep Learning at Scale Using Specialized Logic, in Hot Chips: A Symposium on High Performance Chips, HOTCHIPS, August 2015.
- Jeremy Fowers, Joo-Young Kim, Doug Burger, and Scott Hauck, A Scalable High-Bandwidth Architecture for Lossless Compression on FPGAs, in The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines, IEEE – Institute of Electrical and Electronics Engineers, 4 May 2015.
- Kalin Ovtcharov, Olatunji Ruwase, Joo-Young Kim, Jeremy Fowers, Karin Strauss, and Eric S. Chung, Accelerating Deep Convolutional Neural Networks Using Specialized Hardware, Microsoft Research, 23 February 2015.
- Janarbek Matai, Joo-Young Kim, and Ryan Kastner, Energy Efficient Canonical Huffman Encoding, in The 25th IEEE International Conference on Application-specific Systems, Architectures and Processors , 18 June 2014.
- Andrew Putnam, Adrian Caulfield, Eric Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, Jim Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, and Doug Burger, A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services, in 41st Annual International Symposium on Computer Architecture (ISCA), June 2014.
- Joo-Young Kim, Scott Hauck, and Doug Burger, A Scalable Multi-engine Xpress9 Compressor with Asynchronous Data Transfer, IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines, 11 May 2014.
- Seungjin Lee, Minsu Kim, Kwanho Kim, Joo-Young Kim, and Hoi-Jun Yoo, 24-GOPS 4.5-mm2 Digital Cellular Neural Network for Rapid Visual Attention in an Object-Recognition SoC, in Transactions on Neural Networks, IEEE, January 2011.
- Joo-Young Kim, Junyoung Park, Seungjin Lee, Minsu Kim, Jinwook Oh, and Hoi-Jun Yoo, A 118.4GB/s Multi-Casting Network-on-Chip with Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition, in Journal of Solid-State Circuits, IEEE, July 2010.
- Joo-Young Kim, Sejong Oh, Seungjin Lee, Minsu Kim, Jinwook Oh, and Hoi-Jun Yoo, An Attention Controlled Multi-Core Architecture for Energy Efficient Object Recognition, in Signal Processing: Image Communication, Elsevier, 1 June 2010.
- Seungjin Lee, Kwanho Kim, Joo-Young Kim, Minsu Kim, and Hoi-Jun Yoo, Familiarity Based Unified Visual Attention Model for Fast and Robust Object Recognition, in Pattern Recognition, Elsevier, March 2010.
- Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Kwanho Kim, and Hoi-Jun Yoo, A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor With Bio-Inspired Neural Perception Engine, in Journal of Solid-State Circuits, IEEE, January 2010.
- Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Sejong Oh, and Hoi-Jun Yoo, Real-Time Object Recognition with Neuro-Fuzzy Controlled Workload-aware Task Pipelining, in MICRO, IEEE, November 2009.
- Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim, and Hoi-Jun Yoo, A 60fps 496mW Multi-Object Recognition Processor with Workload-Aware Dynamic Power Management, in International Symposium on Low Power Electronics and Design (ISLPED), ACM/IEEE, August 2009.
- Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Kwanho Kim, Sejong Oh, Jeong-Ho Woo, Donghyun Kim, and Hoi-Jun Yoo, A 201.4GOPS 496mW Real-Time Multi-Object Recognition Processor with Bio-Inspired Neural Perception Engine, in International Solid-State Circuits Conference (ISSCC), IEEE, February 2009.