John Davis
RESEARCHER
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John was previously a member of Stanford's Hydra research group, which investigated a thread-level speculative Single-Chip Multiprocessor. John completed his PhD in Electrical Engineering at Stanford University at the end of 2006. His research focused on building a Flexible Architecture for Simulation and Testing, FAST. His dissertation describes the hardware and software required to build a reconfigurable prototyping platform focused on implementing computer architectures with novel memory system designs like Hydra or other thread-level parallel architectures. There is a brief description of FAST available on Wikipedia if reading a dissertation is not your thing.
John received his BS in Computer Science and Engineering from the University of Washington in 1997. He later spent two years as a faculty research assistant for the Computer Science department at the University of Maryland in College Park. Simultaneoulsy, John worked on various bioinformatics projects at Johns Hopkins Medical Institute for the Department of Pathology. John was awarded his MS in Electrical Engineering from Stanford with an emphasis in Compilers and Digital Circuit Design in 2001. John also spent three years working in the Niagara Architecture Performance Group for Sun Microsystems from 2003-2006.
John is a Researcher in Microsoft Research's Silicon Valley lab, which he joined in March, 2007. His widely varied research interests include computer architecture, large-scale systems to embedded systems, FPGA-based systems, application behavior and performance tuning, and hardware-software co-design and interaction.
Publications
- Michael Wei, Mahesh Balakrishnan, John D. Davis, Dahlia Malkhi, Vijayan Prabhakaran, and Ted Wobber, Dynamically Scalable, Fault-Tolerant Coordination on a Shared Logging Service, no. MSR-TR-2013-40, 28 March 2013
- Michael Wei, John D. Davis, Ted Wobber, Mahesh Balakrishnan, and Dahlia Malkhi, Beyond Block I/O: Implementing a Distributed Shared Log in Hardware, in SYSTOR 2013 (the 6th International Systems and Storage Conference), 2013
- Mahesh Balakrishnan, Dahlia Malkhi, John Davis, Vijayan Prabhakaran, Michael Wei, and Ted Wobber, CORFU: A Distributed Shared Log, in ACM Transactions on Computer Systems, ACM, 2013
- John D. Davis, Suzanne Rivoire, Moises Goldszmidt, and Ehsan K. Ardestani, CHAOS: Composable Highly Accurate OS-based Power Models, in International Symposium on Workload Characterization, IEEE, November 2012
- John D. Davis, Suzanne Rivoire, and Moises Goldszmidt, Star-Cap: Cluster Power Management Using Software-Only Models, no. MSR-TR-2012-107, October 2012
- John D. Davis and Eric S. Chung, SpMV: A Memory-Bound Application on the GPU Stuck Between a Rock and a Hard Place, no. MSR-TR-2012-95, 14 September 2012
- Mahesh Balakrishnan, Dahlia Malkhi, Vijayan Prabhakaran, Ted Wobber, Michael Wei, and John Davis, CORFU: A Shared Log Design for Flash Clusters, in 9th USENIX Symposium on Networked Systems Design and Implementation (NSDI '12), USENIX, April 2012
- Srinidhi Kestur, John D. Davis, and Eric S. Chung, Towards a Universal FPGA Matrix-Vector Multiplication Architecture, in IEEE Symposium on Field-Programmable Custom Computing Machines, IEEE, April 2012
- Laura M. Grupp, John D. Davis, and Steven Swanson, The Bleak Future of NAND Flash Memory, in 10th USENIX Conference on File and Storage Technologies , USENIX, February 2012
- Dahlia Malkhi, Mahesh Balakrishnan, John Davis, Vijayan Prabhakaran, and Ted Wobber, From Paxos to CORFU: A Flash-Speed Shared Log, in ACM SIGOPS Operating Systems Reviews, ACM SIGOPS, 2012
- John D. Davis, Suzanne Rivoire, Moises Goldszmidt, and Ehsan K. Ardestani, Including Variability in Large-Scale Cluster Power Models, in Computer Architecture Letters, IEEE Computer Society, November 2011
- John D. Davis, Suzanne Rivoire, Moises Goldszmidt, and Ehsan K. Ardestani, No Hardware Required: Building and Validating Composable Highly Accurate OS-based Power Models, no. MSR-TR-2011-89, July 2011
- John D. Davis, Suzanne Rivoire, Moise Goldszmidt, and Ehsan K. Ardestani, Accounting for Variability in Large-Scale Cluster Power Models, in 2nd Workshop on Exascale Evaluation and Research Techniques, Held in Conjunction with ASPLOS 2011, Association for Computing Machinery, Inc., March 2011
- Laura M. Grupp, Adrian M. Caulfield, Joel Coburn, John D. Davis, and Steven Swanson, Beyond the Datasheet: Using Test Beds to Probe Non-Volatile Memories’ Dark Secrets, in IEEE Globecomm 2010 Workshop on Application of Communciation Theory to Emerging Memory Technologies (ACTEMT), IEEE, 6 December 2010
- Srinidhi Kestur, John D. Davis, and Oliver Williams, BLAS Comparison on FPGA, CPU and GPU, in IEEE Computer Society Symposium on VLSI, IEEE, July 2010
- Vijayan Prabhakaran, Mahesh Balakrishnan, John D. Davis, and Ted Wobber, Depletable Storage Systems, in 2nd Workshop on Hot Topics in Storage and File Systems, USENIX, 22 June 2010
- Laura Keys, Suzanne Rivoire, and John D. Davis, The Search for Energy-Efficient Building Blocks for the Data Center, in Workshop on Energy-Efficient Design, Springer Verlag, June 2010
- Yasuko Watanabe, John D. Davis, and David Wood, WiDGET: Wisconsin Decoupled Grid Execution Tiles, in Proceedings of the 37th International Symposium on Computer Architecture, Association for Computing Machinery, Inc., June 2010
- John D. Davis and Suzanne Rivoire, Building Energy-Efficient Systems for Sequential I/O Workloads, no. MSR-TR-2010-30, March 2010
- Hari Kannan, Mihai Budiu, John D. Davis, and Girish Venkataramani, Tuning SoCs using the Global Dynamic Critical Path, in the Proceedings of the 22nd IEEE International SOC Conference (SOCC), IEEE, September 2009
- Abhishek Rajimwale, Vijayan Prabhakaran, and John D. Davis, Block Management in Solid-State Devices, in Proceedings of the USENIX Annual Technical Conference (USENIX'09), USENIX, June 2009
- Hari Kannan, Mihai Budiu, John D. Davis, and Girish Venkataramani, Tuning SoCs using the Dynamic Critical Path, no. MSR-TR-2009-44, 20 April 2009
- John D. Davis, Charles P. Thacker, and Chen Chang, BEE3: Revitalizing Computer Architecture Research, no. MSR-TR-2009-45, April 2009
- John D. Davis and Lintao Zhang, FRP: a Nonvolatile Memory Research Platform Targeting NAND Flash, in The First Workshop on Integrating Solid-state Memory into the Storage Hierarchy, Held in Conjunction with ASPLOS 2009, Association for Computing Machinery, Inc., March 2009
- John D. Davis, Zhangxi Tan, Fang Yu, and Lintao Zhang, A Practical Reconfigurable Hardware Accelerator for Boolean Satisfiability Solvers, in 45th Design Automation Conference (DAC), Association for Computing Machinery, Inc., June 2008
- Martha Mercaldi Kim, John D. Davis, Mark Oskin, and Todd Austin, Polymorphic On-Chip Networks, in International Symposium on Computer Architecture (ISCA-35), Institute of Electrical and Electronics Engineers, Inc., June 2008
- Nitin Agrawal, Vijayan Prabhakaran, Ted Wobber, John D. Davis, Mark Manasse, and Rina Panigrahy, Design Tradeoffs for SSD Performance, in Proceedings of the 2008 USENIX Technical Conference (USENIX'08), USENIX, June 2008
- John D. Davis, Zhangxi Tan, Fang Yu, and Lintao Zhang, Designing an Efficient Hardware Implication Accelerator for SAT Solving, in International Conference on Theory and Applications of Satisfiability Testing (SAT), Springer, Guangzhou, China, May 2008
- John D. Davis, Building FAST: A Flexible Architecture for Simulation and Testing , VDM Verlag Dr. Mueller, April 2008
- John D. Davis, FAST: A FLEXIBLE ARCHITECTURE FOR SIMULATION AND TESTING OF MULTIPROCESSOR AND CMP SYSTEMS, December 2006
- John D. Davis, Cong Fu, and James Laudon, The RASE (Rapid, Accurate Simulation Environment) for Chip Multiprocessors, in ACM SIGARCH Computer Architecture News, Association for Computing Machinery, Inc., November 2005
- John D. Davis, James Laudon, and Kunle Olukotun, Maximizing CMP Throughput with Mediocre Cores, in The 14th International Conference on Parallel Architectures and Compilation Techniques, Institute of Electrical and Electronics Engineers, Inc., September 2005
- Lance Hammond, Vicky Wong, Mike Chen, Brian D. Carlstrom, John D. Davis, Ben Hertzberg, Manohar K. Prabhu, Honggo Wijaya, Christos Kozyrakis, and Kunle Olukotun, Transactional Memory Coherence and Consistency, in International Symposium on Computer Architecture (ISCA-31), Institute of Electrical and Electronics Engineers, Inc., June 2004
- Kilian Stoffel, John D. Davis, Gerald Rottman, Joel Saltz, James Dick, William Merz, and Robert Miller, A Graphical Tool for Ad Hoc Query Generation, in American Medical Informatics Association, American Medical Informatics Association, November 1998
