Phase-Change Memory as a Scalable DRAM Alternative
Memory scaling is in jeopardy as charge storage and sensing mechanisms become less reliable for prevalent memory technologies, such as DRAM. In contrast, phase change memory (PCM) storage relies on scalable current and thermal mechanisms. To exploit PCM’s scalability as a DRAM alternative, PCM must be architected to address relatively long latencies, high energy writes, and finite endurance.
In [ISCA'09], we propose, area-neutral architectural enhancements that address these limitations and make PCM competitive with DRAM. The proposed memory architecture lays the foundation for exploiting PCM scalability and non-volatility in main memory. PCM scalability implies lower main memory energy and greater write endurance. Furthermore, non-volatile main memories hold the potential to fundamentally change the landscape of computing. Software cognizant of this newly provided persistance can provide qualitatively new capabilities. For example, system boot/hibernate can be perceived as instantaneous; application checkpointing can be made inexpensive; file systems can provide stronger safety guarantees. Thus, the analysis in this work is a step towards a fundamentally new memory hierarchy with deep implications across the hardware-software interface.
Better I/O via Byte-Addressable, Persistent Memory
For decades, computer systems have been built around the assumption that persistent storage is accessed via a slow, block-based interface. However, new persistent, byte-addressable memory technologies such as PCM offer fast, fine-grained access to persistent storage. Whereas existing systems must compromise between the speed of volatile memory and the safety of non-volatile storage, systems based on persistent, byte-addressable memory can provide the best of both worlds.
In [SOSP'09], we present a file system and a hardware architecture that are built around the properties of persistent, byte-addressable memory. Our file system, PFS, uses atomic, fine-grained updates to persistent storage in order to provide better performance and stronger safety and consistency guarantees than traditional file systems, even when compared on the same memory technologies. Our hardware architecture enforces the atomicity and ordering guarantees required by PFS while still providing the benefits of the L1 and L2 caches. On top of stronger safety and consistency guarantees, the superior performance of this storage system effectively eliminates the need to block and context-switch an application during file I/O.
