Parallelism-Aware Batch Scheduling: Enabling High-Performance and Fair Memory Controllers

Onur Mutlu and Thomas Moscibroda

Abstract

Uncontrolled interthread interference in main memory can destroy individual threads’ memory-level parallelism, effectively serializing the memory requests of a thread whose latencies would otherwise have largely overlapped, thereby reducing single-thread performance. PAR-BS, the parallelism-aware batch scheduler, preserves each thread’s memory-level parallelism, ensures fairness and starvation freedom, and supports system-level thread priorities.

Details

Publication typeArticle
Published inIEEE Micro. Special Issue: Micro's Top Picks from 2008 Computer Architecture Conferences
PublisherIEEE
> Publications > Parallelism-Aware Batch Scheduling: Enabling High-Performance and Fair Memory Controllers