We present optimizations for sparse matrix-vector multiply SpMV and its generalization to multiple vectors, SpMM, when the matrix is symmetric: (1) symmetric storage, (2) register block, and (3) vector blocking. Combined with register blocking, symmetry saves more than 50% in matrix storage. We also show performance speedups of 2.1x for SpMV and 2.6x for SpMM, when compared to the best non-symmetric register blocked implementation.

We present an approach for the selection of tuning parameters, based on empirical modeling and search that consists of three steps: (1) off-line benchmark, (2) run-time search, and (3) heuristic performance model. This approach generally selects parameters to achieve performance within 85% of that achieved with exhaustive search.

We evaluate our implementations with respect to upper bounds on performance. Our model bounds performance by considering only the cost of memory operations and using lower bounds on teh number of cache misses. Our optimized codes are within 68% of the upper bounds.

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In: International Conference on Parallel Processing (ICPP)

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