IDE Ultra/33 Performance: Intel PIIX4E

The Intel 82371AB PCI-to-ISA / IDE Xcelerator, also known as the PIIX4E, provides a bridge from dual IDE peripheral buses to the PCI bus (which accesses main memorey via another Intel chipset). A current IDE bus can burst data at 33 MB/s. A 32-bit 33 MHz PCI can burst data at 133 MB/s. For IDE->PCI transfers, the PIIX4E can pretty much keep up with an IDE bus (up to 32.6 MB/s). However,it appears that the PIIX4E is limited to 21.9 MB)s for bursting data for PCI->IDE transfers. Adding in the setup / cleanup DMA costs (per request), the PIIX4E can sustain up to 21.4 MB/s for 64KB disk writes (i.e., DMA reads) and 28.5 MB/s for 64KB disk reads (i.e., DMA writes) on a Pentium-II system running Windows 2000 Professional. In the case of disk reads, the 14% performance difference between specified and realized bandwith is largely due to DMA setup / cleanup activity. Between requests, a number of PIO’s (programmed I/ O transfers, indicative of register accesses in this case&41; and processing delays reduce raw throughput to 28.5 MB/s for 64 KB requests (29.1 MB/s for 128KB requests). In the case of disk writes, the performance degradation is much more severe. A third of the available bandwidth is lost to delays embedded in the actual data transfer, with DMA set / cleanup activity claiming another 1-2% of the remaining bandwidth. Synchronized traces of PCI and IDE and IDE activity conclusively show that the PIIX4E is responsible for the data transfer delays.