A Framework for Automated Acceleration of Application Binaries on eMIPS

Haris Javaid, Richard Neil Pittman, and Alessandro Forin

Abstract

Application specific extensions to a processor provide an efficient mechanism to accelerate applications and reduce their power consumption. Furthermore, proliferation of FPGA devices has driven application acceleration into the domain of reconfigurable computing. In this work, we propose a framework for automated acceleration of application on a dynamically extensible processor, eMIPS. Our framework takes an application binary instead of application source code, and outputs modified application binary (with eMIPS extended instruction(s)) and bit stream. The accelerated application can then be prototyped on an FPGA board to quantify the speedup instead of relying on mere simulation.

The proposed framework incorporates Giano, a real-time full system simulator to profile application binaries. A set of basic block processing tools (BBTools) are used to analyze the application binary with the profiling information to find hyper-blocks (hot spots of the application). These hyper-blocks are converted to synthesizable Verilog with M2V, a hardware compiler. Finally, Xilinx’s ISE and PlanAhead are integrated into our framework to generate full and partial bit streams for prototyping the accelerated application on an FPGA board.

Details

Publication typeTechReport
NumberMSR-TR-2011-12
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