Code Generation for the Beehive ISA

Developing computer architecture research platforms is difficult because it requires both the hardware platform and the software toolchain. In this paper, we describe the code-generation task of the software toolchain for the Beehive platform. Beehive is a many-core computer composed of simple 32-bit RISC connected using a token ring to a memory controller and Ethernet controller. We discuss the ISA, ABI, and idiosyncracies of the RISC core and its impact and the compiler. We also discuss the differences in porting GCC and LLVM and their resulting performance on small benchmarks in terms of code size and execution time.

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Publisher  Microsoft Research
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