Compiler Aided Selective Lock Assignment for Improving the Performance of Software Transactional Memory

Atomic sections have been recently introduced as a language construct to improve the programmability of concurrent software. They simplify programming by not requiring the explicit specification of locks for shared data. Typically atomic sections are supported by software either through the use of optimistic concurrency by using transactional memory or through the use of pessimistic concurrency using compiler-assigned locks. As a transactional memory system does not take advantage of the specific memory access patterns of an application it often suffers from false conflicts and high validation overheads. On the other hand, the compiler usually ends up assigning coarse grain locks as it relies on a conservative whole program points-to analysis which is conservative by nature. This adversely affects performance by limiting concurrency.

In order to mitigate the disadvantages associated with STM’s lock assignment scheme, this paper we propose a hybrid approach which combines STM’s lock assignment with a compiler aided selective lock assignment scheme (referred to as SCLA-STM). SCLA-STM overcomes the inefficiencies associated with both a purely compile-time lock assignment approaches and purely STM based approaches by (i) using the underlying STM for shared variables where only a conservative analysis is possible by the by the compiler (e.g., in the presence of may-alias points to information) and (ii) being selective about the shared data chosen for the compiler-aided lock assignment. We describe our prototype SCLA-STM scheme implemented in the hp-ux IA-64 C/C++ compiler, using TL2 as our STM implementation. We show that SCLA-STM improves application performance for certain STAMP benchmarks from 1.68% to 37.13%

In  Proceedings of Principles and Practice of Parallel Programming (PPoPP 2010)

Publisher  Association for Computing Machinery, Inc.
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