This is a bus-mastering PCIe FPGA design for the Xilinx ML605 development board that acts as an interface between a PC host's main memory and the DDR3 SODIMM on the ML605 board. An accompanying WDM driver and test application demonstrate how to access the hardware and provide speed and memory tests running at up to 1.5 gigabytes per second. The accompanying paper may be found in the proceedings of FPL 2012.
Date: 24 August 2012
Size: 49.61 MB
This API provides users with a standard FPGA communication interface from C++ code. It is intended to encourage more widespread adoption of FPGAs and reconfigurable computing platforms — particularly among Windows application developers. In addition to a few bug fixes, this version adds two new features: 1)compatibility with the Windows 7 Virtual PC network driver and 2) provides fully plug-compatible Modelsim simulation of the hardware.
Date: 8 November 2011
Size: 2.10 MB
The "extensible MIPS" is a dynamically extensible processor that offers application-specific hardware in a general-purpose, multiuser system environment. It enables multiple secure extensions to load dynamically and extend the core instruction set of the microprocessor. Extended instructions can speed application programs dramatically just by patching their binaries. The eMIPS prototype is built out of a Xilinx FPGA using the XUP board. Source and software tests are included in this download.
Date: 28 December 2010
Size: 25.35 MB
Giano is a framework for the full-system simulation of arbitrary computer systems, with special emphasis on the hardware-software co-development of system software and Real-Time embedded applications. Giano includes both software models for CPU, I/O, busses and memories, and HDL simulators. Full source and a number of full-systems examples are included.
Date: 21 December 2010
Size: 34.97 MB
A customizable image viewer for use with the SenseCam or the Vicon Revue, providing facilities for reviewing a sequence of SenseCam images, as well as for tagging and exporting them.
Date: 20 December 2010
Size: 0.82 MB
This is a compiler for the Bulk-Synchronous GPU Programming (BSGP) language. BSGP is a new language for general-purpose computation on a graphics processing unit (GPU). BSGP programs look similar to sequential C programs, and programmers need to supply only a bare minimum of extra information to describe parallel processing on GPUs. As a result, BSGP programs are easy to read, write, and maintain, and the ease of programming does not come at the cost of performance.
Date: 12 December 2009
Size: 38.40 MB
The PSL-to-Verilog compiler (P2V) generates hardware checkers for assertions made on a software program, using the Property Specification Language (PSL). The compiler is written in Python and compiles for the eMIPS dynamically extensible processor.
Date: 27 August 2008
Size: 0.62 MB